1. Field
The technology relates to multi-stage switched capacitors.
2. Description of Related Art
FIGS. 1 and 2 are diagrams of a multi-stage amplifier circuit operating in different stages, the first stage 150 and the second stage 160. Although the boundaries of first stage 150 and the second stage 160 are drawn to exclude the operational amplifier 102 for clarity of distinguishing whether particular circuitry external to the operational amplifier belongs to a particular stage, both the first stage 150 and the second stage 160 actually include the shared operational amplifier 102. Because the different stages share the same operational amplifier, this amplifier design saves cost, area, and power in comparison with a cascaded design that has separate operational amplifiers for different stages of an amplifier circuit.
FIG. 1 is a diagram of a multi-stage amplifier circuit operating in the first stage. The operational amplifier 102 includes a grounded noninverting input 103, an inverting input 104, and an output 105. Switches 121 and 122 are set to provide an input signal for input capacitor Ci1 112 to the operational amplifier inverting input 104. Switch 121 is set also to decouple the signal source 110 from the remainder of the amplifier circuit. Switches 136 and 137 are set to provide feedback with feedback capacitor Cf1 130 from the operational amplifier output 105 to the inverting input 104. Switches 134 and 135 are set to decouple feedback capacitor Cf2 132 from the operational amplifier output 105 and the inverting input 104. Switches 123 and 124 are set to store the output signal of the first stage of the amplifier circuit on input capacitor Ci2 114 from the operational amplifier output 105.
FIG. 2 is a diagram of a multi-stage amplifier circuit operating in the second stage. During the first stage of the amplifier circuit, input capacitor Ci2 114 stored the output signal from the operational amplifier output 105. Switches 123 and 124 are set to provide this output signal stored on input capacitor Ci2 114 as the input signal of the second stage of the amplifier circuit to the operational amplifier inverting input 104. Switches 121 and 122 are set to decouple the input capacitor Ci1 112 from the operational amplifier 102. Switches 121 and 122 are set also to couple the input capacitor Ci1 112 to the signal source 110 and store the input signal generated by the signal source 110. When the amplifier circuit subsequently operates in the first stage, the input signal stored by the input capacitor Ci1 112 will be provided to the operational amplifier inverting input 104. Switches 134 and 135 are set to provide feedback with feedback capacitor Cf2 132 from the operational amplifier output 105 to the inverting input 104. Switches 136 and 137 are set to decouple feedback capacitor Cf1 130 from the operational amplifier output 105 and the inverting input 104. The output signal at the operational amplifier output 105 during the second stage of the amplifier circuit, is the output signal of the amplifier circuit.
FIGS. 3 and 4 are diagrams of the cascaded equivalent of the multi-stage amplifier of FIGS. 1 and 2. Although the actual implementation of the multi-stage amplifier is not cascaded because multiple stages share the same operational amplifier, the cascaded view provides another point of view of the operation of the multi-stage amplifier. FIG. 3 is a diagram of the cascaded equivalent of the multi-stage amplifier circuit of FIG. 1 operating in the first stage. FIG. 4 is a diagram of the cascaded equivalent of the multi-stage amplifier circuit of FIG. 2 operating in the second stage.
FIG. 5 is a diagram of the multi-stage amplifier circuit showing the parasitic capacitance 170 across the inverting input 104 and noninverting input 103 of the operational amplifier. The parasitic capacitance shown is a symbolic lumped representation of many sources that contribute capacitance, such as capacitance of the interconnects; and gate-to-drain capacitance, gate-to-source capacitance, drain-to-body capacitance, and source-to-body capacitance of the transistor coupled to the node of the operational amplifier input.
This parasitic capacitance is less of an issue in a cascaded implementation that does not share the same operational amplifier, because the stage not presently operating can simply short or otherwise reset the operational amplifier input. However, in multi-stage amplifier circuits that share the same operational amplifier among multiple stages, the operational amplifier may be in continuous or near-continuous use, denying any opportunity to short or otherwise reset the operational amplifier input. As a result, the parasitic capacitance can build up undesired charge during operation of the amplifier circuit, distorting the output of the amplifier circuit. Accordingly, it would be desirable to operate a multi-stage amplifier sharing the operational amplifier among multiple stages, without suffering the penalties of parasitic capacitance caused by the shared operational amplifier architecture.